AI Accelerator Microarchitect - Stealth Startup - San Francisco
Are you an ambitious ASIC engineer looking for real responsibility and ownership in a fast-growing startup environment? We have partnered exclusively with one of the most exciting companies in the AI accelerator space in San Francisco looking for founding-level engineers to spearhead microarchitecture development in truly revolutionary technology.
What You'll Do
- Define the microarchitecture for AI accelerator hardware.
- Design and evaluate compute datapaths, memory hierarchies, scheduling, control logic, and dataflow.
- Translate AI workload requirements into hardware specifications.
- Drive architecture trade-offs across performance, power, area, bandwidth, and programmability.
- Develop or guide performance models to evaluate design options.
- Collaborate closely with RTL, verification, physical design, compiler, and runtime teams.
- Ensure designs are implementable, verifiable, and optimized for silicon.
- Use AI tools to accelerate architecture exploration, specification development, and design reviews.
What We're Looking For
- 1-7 years of experience in computer architecture, AI accelerators, GPUs, NPUs, TPUs, SoCs, or high-performance digital design.
- Experience defining or implementing hardware microarchitecture.
- Strong understanding of AI inference workloads and hardware design trade-offs.
- Experience working with RTL and verification teams.
- Familiarity with SystemVerilog, Verilog, or similar hardware description languages.
- Experience with performance modelling, architecture simulation, or design-space exploration.
- Excellent technical communication skills.
- Comfortable working in a fast-paced, collaborative engineering environment.
- Enthusiastic about using AI to improve engineering productivity.
If you're looking to make a real impact from an incredibly early stage of AI Accelerator technology, click 'Apply' now! Be quick, as this role is highly in-demand and interviews are already being scheduled.
